The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various methods and circuits to protect semiconductor devices from conditions that cause the output of the semiconductor device to be driven to a voltage higher than the power supply of the semiconductor device. One particular concern was protecting the semiconductor device from high voltages applied to the output by other devices that were connected to the output. Systems utilizing such different voltage supplies are often referred to as mixed mode systems or systems using mixed mode power supplies. For example, a P-channel output device required special protection when if the output were taken to a voltage that is higher than the power supply applied to the P-channel output device. One particular protection method utilized voltage threshold adjustment implants or diffusions to raise the threshold of the P-channel device to provide protection for the higher voltage conditions and to ensure that the higher voltage did not cause a malfunction of the system.
One problem of such protection methods was the cost. Increasing the threshold voltage by a threshold implant lowered the drain current that could be provided by the P-channel transistor, thus, the size of the transistor had to be increased to provide the desired current thereby increasing the manufacturing cost. Additionally, the threshold implant required additional processing steps and additional mask layers that also increased the manufacturing cost of the semiconductor device.
Accordingly, it is desirable to have a method of protecting a semiconductor device from over voltage conditions on an output that does not require a threshold adjustment to the output transistor, that does not require additional manufacturing steps, that does not require additional mask layers, that reduces the size of the output transistor, and that reduces the cost of the semiconductor device.